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EDA Tools

For much of its design work matricus uses the LayTools products fro their EDA tools. Details on these products can be obtained from the LayTools web site at:

www.laytools.com

The software is a comprehensive tool set with considerable flexibility and remarkable stability that can handle the data densities and accuracies required for  today's custom IC design and verification. The suite has been used by matricus for over twelve years and includes a mixed signal simulator, LaySim, power by the renowned SMASH kernel.

The LayTools software includes:

schematic capture
net-listing (selection of formats)
layout editor (variety of interfaces) or layout viewer
parametric cells (PGroups)
on-line drc
schematic driven layout
physical verification (drc, lvs, extraction)
automatic place and route
simulation (mixed mode, HSpice compatible, variety of device models)
general interface and plotting utilities

In addition, other tools not part of the LayTools suite are used by the matricus team for synthesis, for example, and for other specialist tasks.