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SMASH

As silicon geometries shrink, device models become more complex and the number of elements that must be included in any simulation increase. A respectable simulator must accommodate such advances as well as provide the features and options to allow effective circuit development to be completed. Smash is that simulator.

The software is available with a number of application-oriented versions (ASIC, MEMS, or PCB) and various configuration options within each in order that the most cost-effective solution can be provided to the user.

SMASH is a mixed-signal; multi-language, multi-level, single kernel simulator. Thus it:

allows device definition in primitive devices or high level descriptions
handles analog and discrete level signals
recognizes a range of net-list languages from SPICE and high level description languages
allows net-lists to include a variety of the different languages it recognizes (electrical, structural, functional and behavioral)
synchronization of analog and digital partitions without delay, instability, or distortion

The result is fast, accurate mixed signal simulations

key features:

identical availability on Windows, Linux and Solaris allowing heterogeneous networking
the only genuine mixed signal, multi-level, multi-domain simulator on the market today
support of all device-level and RTL design languages: SPICE, ABCD, C, VHDL, VERILOG-HDL, VHDL-AMS and VERILOG-AMS
best transistor models support including BSIM3v3 and level 49, EKV, BSIM4, VBIC, and MEXTRAM
SMASH exclusive capabilities such as dynamic ERC and dynamic SRC (Electrical Rule Checks and Specification Rule Checks)
a rich range of utilities including SoC HLE for schematic capture and RTL flow-charting, as well as COACH to interface with Cadence Composer

additional features:

STI stress equations for BSIM3/ BSIM4 family of models including both Berkeley and TSMC specific equations
Enhanced DSP toolbox for periodic signal characterization with jitter measurement and histograms
Streamlined transient noise analysis, taking into account custom equations and noise parameters
Batch-mode data-extraction on FFT results
Verilog-AMS small signal analysis
Analog operators in Verilog-AMS such as transition filters, slew integrators or circular integrators
Enhancement of time control for Verilog timing checks and VHDL VITAL

Software vendor information:

Dolphin Logo

Further details about SMASH may be found on this web site:
SMASH software options

and information on the software author, Dolphin Integration and other products may be found at:
http://www.dolphin-integration.com/