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Home → Products → EDA Tools → Electrical Design → SMASH Components SMASH ComponentsGUITAR(Graphics User Interface for Trading off Accuracy and Rapidity) As circuits and analysis requirements become progressively more complex, the task of establishing the speed and accuracy settings becomes increasingly more frustrating. GUITAR resolves this for each circuit and simulation type requested. It includes a user-friendly interface and it allows user interaction (manual mode) to set the many parameters which must be defined before simulation may commence. Most engineers are aware only of a limited number of these parameters, allowing those unknown to default. GUITAR optimizes all parameters including algorithms to improve convergence, accuracy of multi-domain variables, and lead to faster simulation. SCROOGESCROOGE is a Logic Power Consumption Simulator and an add-on to all SMASH ASIC options. The module uses the logic net-list (Verilog or VHDL) together with power models (written in the Liberty format *.lib files) to simulate for static leakage and dynamic power consumption. It also reports average and peak currents. The tool is being developed to handle mixed signal designs with analysis at not only system level, but also synthesizable, structural and device level. JITTER Compliance AssessmentA number of embedded components such as PLL’s and DLL’s have performance Specifications which include jitter compliance. Failure to meet such Specification items can result in degraded performance, or reduced yield, or failure to function. Until recently no efficient solutions have been available to simulate this aspect of design in anything but the smallest of circuits, where a transient analysis could be performed. The SMASH add-on compartments the circuit and applies a transient noise simulation to each sub-block. Because SMASH is a multilevel simulator it can now run a combined behavioral and transient simulation incorporating the results of the sub-block result. COACHCOACH is designed to run under the Cadence Framework and allow Composer schematics to be net-listed for SMASH. It allows: - mixed language (Spice and Verilog) and mixed signal net-listing
- cross-probing of nets from schematic to SMASH waveform
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