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SMASH
Characteristic

SMASH
Component

SMASH Options

ASIC
Options

MEMS
Options

PCB
Option

Seduction

STD

LOG

CORE

OVI

HDL

MECHA

MEMS

PCB

Heart of
SMASH

Mixed-signal
kernel

Graphic
interface (GUI)

Batch interface
(CLI)

Graphic
Waveform
viewer

Unlimited
circuit size

-

5 operating
point heuristics

-

4 analog
solvers

-

Languages

SPICE

-

-

Verilog-HDL
structural

-

-

Verilog-HDL
behavioral

-

-

-

Verilog-A

-

-

-

-

-

-

Verilog-AMS

P

-

-

-

P

P

-

-

-

Verilog-FD

Pending RINCON integration for HF/RF extensions

VHDL

-

-

-

VHDL-AMS

-

-

-

-

VHDL-FD

Pending RINCON integration for HF/RF extensions

C / SystemC

-

-

-

ABCD

-

-

-

Features

ASIC models

-

-

-

Relax

-

-

-

VHDL VITAL

-

-

-

Verilog SDF

P

-

-

Advanced
Features

Dynamic ERC

-

-

-

Transient noise

-

-

Imbalance
Locate

-

-

Jitter
simulation

-

-

-

-

P

-

Libraries

Emblem-Mecha

-

-

-

-

-

-

O

O

-

Diadem

-

Add-ons

Trans

-

O

-

O

O

O

-

O

O

Shaker

-

O

O

O

O

O

-

O

O

Analyses

Operating
point

Transient

Small signal

-

DC Transfer

-

Noise

-

-

FFT

-

Monte Carlo

-

Sweep

Laplace

-

-

Harmonic
Balance

P

P

-

P

P

P

P

P

P

Constellation
& Interfaces

COACH

-

U

U

U

U

U

U

U

-

SMASHNET

-

O

O

O

O

O

O

O

O

Simulink

-

W

W

W

W

W

W

W

W

SUCCESS

-

W

W

W

W

W

W

W

W

MemsMaster

-

O

O

O

O

O

O

O

O

Operating
Systems

Sun Solaris 7

Linux

Windows

Key:

 

P

Pending

O

Optional

W

Optional for Windows

COACH

for Cadence Composer

SMASHNET

Silicon Canvas Laker AMS

MemsMaster

MEMS modeling and simulation

SUCCESS

for hard/soft co-verification

Simulink

for co-simulation with system-level blocks

Linux

RHL 6.2 to RHEL4

Windows

2000 and XP

ASIC Models include:
BSIM3v3, BSIM4v2, BSIM4v3, EKV, ACM, MM9, VBIC, MEXTRAM

 
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